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advanced communications & sensing rev 3 C 9 th sept. 2010 1 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led driver and keypad engine sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led driver and keypad engine g eneral d escription the sx1507qb, sx1508qb and sx1509qb are complete ultra low voltage general purpose parallel input/output (gpio) expanders ideal for low power handheld battery powered equipment. this family of gpios comes in 4-, 8-, 16-channel configuration and allows easy serial expansion of i/o through a standard 400khz i 2 c interface. gpio devices can provide additional control and monitoring when the microcontroller or chipset has insufficient i/o por ts, or in systems where serial communication and control from a remote location is advantageous. these devices can also act as a level shifter to connect a microcontroller running at one voltage le vel to a component running at a different voltage level , thus eliminating the need for extra level translati ng circuits. the core is operating as low as 1.2v (sx1507qb) while the dual i/o banks can operate between 1.2v and 5.5v (sx1507qb) independent of the core voltage and each other (5.5v tolerant). the sx1507qb, sx1508qb and sx1509qb feature a fully programmable led driver with internal oscillator for enhanced lighting control such as intensity (via 256-step pwm), blinking and breathin g (fade in/out) make them highly versatile for a wide range of led applications. in addition, keypad applications are also supported with an on-chip scanning engine that enables continuous keypad monitoring up to 64 keys without any additional host interaction reducing bus activi ty. the sx1507qb, sx1508qb and sx1509qb have the ability to generate mask-programmable interrupt s based on a falling/rising edge of any of its gpio l ines. a dedicated pin (nint) indicates to a host controll er that a state change occurred on one or more of the lines. each gpio is programmable via a bank of 8-bi t configuration registers that include data, directio n, pull-up/pull-down, interrupt mask and interrupt registers. these i/o expanders feature small footpr int packages and are rated from -40c to +85c temperature range. o rdering i nformation part number i/os package marking sx1507qbxxx (1) 4 qfn-ut-14 - sx1508qbiultrt 8 qfn-ut-20 hab7 SX1509QBIULTRT 16 qfn-ut-28 hca5 sx1508bevk 8 evaluation kit - sx1509bevk 16 evaluation kit - (1) future product k ey p roduct f eatures 1.2v to 5.5v (sx1507qb) low operating voltage with dual independent i/o rails (vcc1, vcc2) enable direct level shifting between i/o banks and host controller 5.5v tolerant i/os, up to 15ma output sink on all i/os (no total sink current limit) integrated led driver for enhanced lighting intensity control (256-step pwm) blink control (224 on/off values) breathing control (224 fade in/out values) on-chip keypad scanning engine support up to 8x8 matrix (64 keys) configurable input debouncer 4/8/16 channels of true bi-directional style i/o programmable pull-up/pull-down push/pull or open-drain outputs programmable polarity open drain active low interrupt output (nint) bit maskable programmable edge sensitivity built-in clock management (internal 2mhz oscillator/external clock input, 7 clock values) oscio can be configured as gpo 400khz i 2 c compatible slave interface 4 user-selectable i2c slave addresses power-on reset and reset input (nreset) ultra low current consumption: 1ua typ -40c to +85c operating temperature range up to 2kv hbm esd protection small footprint packages pb & halogen free, rohs/weee compliant t ypical a pplications cell phones, pdas, mp3 players digital camera, notebooks, gps units any battery powered equipment i2c nreset nint vddm 1. 425 - 3.6v vcc1 1.2 - 3.6v vcc2 1.2 - 3.6v sx1508qb full led drive keypad scanning button control host controller io0 io1 io2 io3 io4 io5 io6 io7 addr0 addr1 oscio level shifting
advanced communications & sensing rev 3 C 9 th sept. 2010 2 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led driver and keypad engine table of contents g eneral d escription ................................................... ................................................... ............... 1 o rdering i nformation ................................................... ................................................... ............. 1 k ey p roduct f eatures ................................................... ................................................... ............ 1 t ypical a pplications ................................................... ................................................... ............... 1 1 p in description ................................................... ................................................... ................ 4 1.1 sx1507qb 4-channel i 2 c gpio with led driver 4 1.2 sx1508qb 8-channel i 2 c gpio with led driver and keypad engine 5 1.3 sx1509qb 16-channel i 2 c gpio with led driver and keypad engine 6 1.4 i/os feature summary 7 2 e lectrical c haracteristics ................................................... ............................................ 8 2.1 absolute maximum ratings 8 2.2 electrical specifications 8 3 t ypical o perating c haracteristics ................................................... ............................ 11 4 b lock d etailed d escription ................................................... .......................................... 12 4.1 sx1507qb 4-channel i 2 c gpio with led driver 12 4.2 sx1508qb 8-channel i 2 c gpio with led driver and keypad engine 12 4.3 sx1509qb 16-channel i 2 c gpio with led driver and keypad engine 13 4.4 reset 13 4.4.1 hardware (nreset) 13 4.4.2 software (regreset) 14 4.5 2-wire interface (i 2 c) 14 4.5.1 write 14 4.5.2 read 15 4.6 i/o banks 15 4.6.1 input debouncer 15 4.6.2 keypad scanning engine 15 4.6.3 level shifter 16 4.6.4 polarity inverter 17 4.7 interrupt (nint) 17 4.8 clock management 18 4.9 led driver 18 4.9.1 overview 18 4.9.2 static mode 19 4.9.3 single shot mode 19 4.9.4 blink mode 20 4.9.5 led driver modes 20 4.9.6 synchronization of led drivers across several ics 21 4.9.7 tutorial 21 5 c onfiguration r egisters ................................................... ............................................... 23 5.1 sx1507qb 4-channel gpio with led driver 23 5.2 sx1508qb 8-channel gpio with led driver and keypad engine 26 5.3 sx1509qb 16-channel gpio with led driver and keypad engine 30 6 a pplication i nformation ................................................... ................................................ 36 6.1 typical application circuit 36 6.2 typical led connection 36
advanced communications & sensing rev 3 C 9 th sept. 2010 3 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 7 p ackaging i nformation ................................................... .................................................. 3 7 7.1 qfn-ut 14-pin outline drawing 37 7.2 qfn-ut 14-pin land pattern 37 7.3 qfn-ut 20-pin outline drawing 38 7.4 qfn-ut 20-pin land pattern 38 7.5 qfn-ut 28-pin outline drawing 39 7.6 qfn-ut 28-pin land pattern 39 8 s oldering p rofile ................................................... ................................................... ........ 40 9 m arking i nformation ................................................... ................................................... ... 41
advanced communications & sensing rev 3 C 9 th sept. 2010 4 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 1 p in description 1.1 sx1507qb 4-channel i 2 c gpio with led driver pin symbol type description 1 sda dio i 2 c serial data line 2 scl di i 2 c serial clock line 3 nreset di active low reset input 4 nint do active low interrupt output 5 addr0 di address input bit 0, connect to vddm or gnd 6 addr1 di address input bit 1, connect to vddm or gnd 7 i/o[0] dio (*1) i/o[0], at power-on configured as an input led driver : intensity control (pwm), blinking 8 i/o[1] dio (*1) i/o[1], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) 9 vcc1 p i/o supply voltage 10 gnd p ground pin 11 i/o[2] dio (*1) i/o[2], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) 12 i/o[3] dio (*1) i/o[3], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) 14 oscio dio (*1) oscillator input/output, can also be used as gpo 13 vddm p main supply voltage d/i/o/p: digital/input/output/power (*1) this pin is programmable through the i 2 c interface table 1 C sx1507qb pin description figure 1 C sx1507qb qfn-ut-14 pinout
advanced communications & sensing rev 3 C 9 th sept. 2010 5 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 1.2 sx1508qb 8-channel i 2 c gpio with led driver and keypad engine pin symbol type description 1 nreset di active low reset input 2 sda dio i 2 c serial data line 3 scl di i 2 c serial clock line 4 addr0 di address input bit 0, connect to vddm or gnd 5 i/o[0] dio (*1) i/o[0], at power-on configured as an input led driver : intensity control (pwm) 6 i/o[1] dio (*1) i/o[1], at power-on configured as an input led driver : intensity control (pwm) 7 vcc1 p supply voltage for bank a i/o[3-0] 8 gnd p ground pin 9 i/o[2] dio (*1) i/o[2], at power-on configured as an input led driver : intensity control (pwm), blinking 10 i/o[3] dio (*1) i/o[3], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) 11 nint do active low interrupt output 12 addr1 di address input bit 1, connect to vddm or gnd 13 oscio dio (*1) oscillator input/output, can also be used as gpo 14 vddm p main supply voltage 15 i/o[4] dio (*1) i/o[4], at power-on configured as an input led driver : intensity control (pwm) 16 i/o[5] dio (*1) i/o[5], at power-on configured as an input led driver : intensity control (pwm) 17 vcc2 p supply voltage for bank b i/o[7-4] 18 gnd p ground pin 19 i/o[6] dio (*1) i/o[6], at power-on configured as an input led driver : intensity control (pwm), blinking 20 i/o[7] dio (*1) i/o[7], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) d/i/o/p: digital/input/output/power (*1) this pin is programmable through the i 2 c interface table 2 C sx1508qb pin description figure 2 C sx1508qb qfn-ut-20 pinout nreset sda scl addr0 i/o[0] i/o[1] vcc1 gnd i/o[2] i/o[3] i/o[4] vddm oscio addr1 nint i/o[7] i/o[6] gnd vcc2 i/o[5] gnd (pad)
advanced communications & sensing rev 3 C 9 th sept. 2010 6 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 1.3 sx1509qb 16-channel i 2 c gpio with led driver and keypad engine pin symbol type description 1 i/o[2] dio (*1) i/o[2], at power-on configured as an input led driver : intensity control (pwm), blinking 2 i/o[3] dio (*1) i/o[3], at power-on configured as an input led driver : intensity control (pwm), blinking 3 gnd p ground pin 4 vcc1 p supply voltage for bank a i/o[7-0] 5 i/o[4] dio (*1) i/o[4], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) 6 i/o[5] dio (*1) i/o[5], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) 7 i/o[6] dio (*1) i/o[6], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) 8 i/o[7] dio (*1) i/o[7], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) 9 nint do active low interrupt output 10 addr1 di address input bit 1, connect to vddm or gnd 11 oscio dio (*1) oscillator input/output, can also be used as gpo 12 vddm p main supply voltage 13 i/o[8] dio (*1) i/o[8], at power-on configured as an input led driver : intensity control (pwm), blinking 14 i/o[9] dio (*1) i/o[9], at power-on configured as an input led driver : intensity control (pwm), blinking 15 i/o[10] dio (*1) i/o[10], at power-on configured as an input led driver : intensity control (pwm), blinking 16 i/o[11] dio (*1) i/o[11], at power-on configured as an input led driver : intensity control (pwm), blinking 17 gnd p ground pin 18 vcc2 p supply voltage for bank b i/o[15-8] 19 i/o[12] dio (*1) i/o[12], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) 20 i/o[13] dio (*1) i/o[13], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) 21 i/o[14] dio (*1) i/o[14], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) 22 i/o[15] dio (*1) i/o[15], at power-on configured as an input led driver : intensity control (pwm), blinking, bre athing (fade in/out) 23 nreset di active low reset input 24 sda dio i 2 c serial data line 25 scl di i 2 c serial clock line 26 addr0 di address input bit 0, connect to vddm or gnd 27 i/o[0] dio (*1) i/o[0], at power-on configured as an input led driver : intensity control (pwm), blinking 28 i/o[1] dio (*1) i/o[1], at power-on configured as an input led driver : intensity control (pwm), blinking (*1) this pin is programmable through the i 2 c interface table 3 C sx1509qb pin description figure 3 C sx1509qb qfn-ut-28 pinout i/o[2] i/o[3] gnd vcc1 i/o[4] i/o[5] i/o[6] i/o[7] nint addr1 oscio vddm i/o[8] i/o[9] i/o[14] i/o[13] i/o[12] vcc2 gnd i/o[11] i/o[10] i/o[1] i/o[0] addr0 scl sda nreset i/o[15] top view gnd (pad) 21 20 19 18 17 16 15 28 27 26 25 24 23 22 8 9 10 11 12 13 14 1 2 3 4 5 6 7
advanced communications & sensing rev 3 C 9 th sept. 2010 7 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 1.4 i/os feature summary sx1507qb sx1508qb sx1509qb led driver led driver keypad led driver keypad i/o pwm blink breathe pwm blink breathe row col. pwm blink breathe row col. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 table 4 C i/os feature summary please note that in addition to table above, all i/ os feature bank-to-bank and bank-to-host level shif ting.
advanced communications & sensing rev 3 C 9 th sept. 2010 8 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 2 e lectrical c haracteristics 2.1 absolute maximum ratings stress above the limits listed in the following tab le may cause permanent failure. exposure to absolut e ratings for extended time periods may affect device reliability . the limiting values are in accordance with the ab solute maximum rating system (iec 134). all voltages are r eferenced to ground (gnd). symbol description min max unit main supply voltage (sx1507qb) - 0.4 6 v v max_vddm main supply voltage (sx1508/9qb) - 0.4 3.7 v digital i/o pin supply voltage (sx1507qb) - 0.4 6 v v max_vcc1-2 digital i/o pin supply voltage (sx1508/9qb) - 0.4 3 .7 v electrostatic handling hbm model (1) (sx1507/8qb) - 2000 v es_hbm electrostatic handling hbm model (1) (sx1509qb) - 1500 v v es_cdm electrostatic handling cdm model - 1000 v electrostatic handling mm model (sx1507/8qb) - 200 v es_mm electrostatic handling mm model (sx1509qb) - 150 v t a operating ambient temperature range -40 +85 c t c junction temperature range -40 +125 c t stg storage temperature range -55 +150 c i lat latchup-free input pin current (2) +/-100 - ma (1) tested according to jesd22-a114a (2) static latch-up values are valid at maximum tem perature according to jedec 78 specification table 5 - absolute maximum ratings 2.2 electrical specifications table below assumes default registers values, unles s otherwise specified. typical values are given for t a = +25c, vddm=vcc1=vcc2=3.3v. symbol description conditions min typ max unit supply sx1507qb 1.2 - 5.5 vddm main supply voltage sx1508/9qb 1.425 - 3.6 v sx1507qb 1.2 - 5.5 vcc1,2 i/o banks supply voltage sx1508/9qb 1.2 - 3.6 v oscillator off - 1 5 internal osc. (2mhz) - tbd tbd main supply current (sx1507qb, i 2 c inactive) external osc. (32khz) - 10 - a oscillator off - 1 5 internal osc. (2mhz) - 175 235 main supply current (sx1508qb, i 2 c inactive) external osc. (32khz) - 10 - a oscillator off - 1 5 internal osc. (2mhz) - 365 460 iddm main supply current (sx1509qb, i 2 c inactive) external osc. (32khz) - 10 - a icc1,2 i/o banks supply current (1) - 1 2 a i/os set as input vcc1,2 >= 2v 0.7* vcc1,2 - 5.5 (8) vih high level input voltage vcc1,2 < 2v 0.8* vcc1,2 - 5.5 (8) v vcc1,2 >= 2v -0.4 - 0.3* vcc1,2 vil low level input voltage vcc1,2 < 2v -0.4 - 0.2* vcc1,2 v ileak input leakage current assuming no active pull-up/down -1 - 1 a ci input capacitance - - - 10 pf
advanced communications & sensing rev 3 C 9 th sept. 2010 9 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine symbol description conditions min typ max unit i/os set as output voh high level output voltage - vcc1,2 C 0.3 - vcc1,2 v vol low level output voltage - -0.4 - 0.3 v vcc1,2 >= 2v - - 8 (2) ioh high level output source current vcc1,2 < 2v - - 2 (2) ma vcc1,2 >= 2v - - 15 (2) iol low level output sink current vcc1,2 < 2v - - 8 (2) ma t pv output data valid timing cf. figure 10 - - 425 ns nint (output) vol low level output voltage - -0.4 - 0.3 v vddm >= 2v - - 8 iol m low level output sink current vddm < 2v - - 4 ma t iv interrupt valid timing from input data change - - 4 s t ir interrupt reset timing from reginterruptsource clearing - - 4 s nreset (input) vddm >= 2v 0.7*vddm - vddm max vih mr high level input voltage vddm < 2v 0.8*vddm - vddm max v vddm >= 2v -0.4 - 0.3*vddm vil m low level input voltage vddm < 2v -0.4 - 0.2*vddm v ileak input leakage current - -1 - 1 a ci input capacitance - - - 10 pf vpor power-on-reset voltage cf. figure 8 - 0.8 - v vdroph high brown-out voltage cf. figure 8 - vddm-1 - v vdropl low brown-out voltage cf. figure 8 - 0.2 - v t reset reset time cf. figure 8 - - 2.5 ms t pulse reset pulse from host uc cf. figure 8 200 - - ns addr0, addr1 (inputs) vddm >= 2v 0.7*vddm - vddm+0.3 vih ma high level input voltage vddm < 2v 0.8*vddm - vddm+0.3 v vddm >= 2v -0.4 - 0.3*vddm vil m low level input voltage vddm < 2v -0.4 - 0.2*vddm v ileak input leakage current - -1 - 1 a ci input capacitance - - - 10 pf oscio (input/output) vddm >= 2v 0.7*vddm - vddm+0.3 1.425v =< vddm < 2v 0.8*vddm - vddm+0.3 vih mo high level input voltage vddm < 1.425v 0.9*vddm - vddm+0.3 v vddm >= 2v -0.4 - 0.3*vddm 1.425v =< vddm < 2v -0.4 - 0.2*vddm v vil mo low level input voltage vddm < 1.425v -0.4 - 0.1*vddm ileak input leakage current - -1 - 1 a ci input capacitance - - - 10 pf voh m high level output voltage - vddm-0.3 - vddm v vol low level output voltage - -0.4 - 0.3 v vddm >= 2v - - 8 ioh m high level output source current vddm < 2v - - 2 ma vddm >= 2v - - 8 iol m low level output sink current vddm < 2v - - 4 ma scl (input) and sda (input/output) (3)
advanced communications & sensing rev 3 C 9 th sept. 2010 10 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine symbol description conditions min typ max unit interface complies with slave f/s mode i 2 c interface as described by philips i 2 c specification version 2.1 dated january, 2000. please refer to that document for more detailed i 2 c specifications. vol low level output voltage - -0.4 - 0.3 v vddm >= 2v - - 8 iol m low level output sink current vddm < 2v - - 4 ma vddm >= 2v 0.7*vddm - vddm max vih mr high level input voltage vddm < 2v 0.8*vddm - vddm max v vddm >= 2v -0.4 - 0.3*vddm vil m low level input voltage vddm < 2v -0.4 - 0.2*vddm v f scl scl clock frequency - - - 400 khz t hd;sta hold time (repeated) start condition - 0.6 - - s t low low period of the scl clock - 1.3 - - s t high high period of the scl clock - 0.6 - - s t su;sta set-up time for a repeated start condition - 0.6 - - s t hd;dat data hold time - 0 (4) - 0.9 (5) s t su;dat data set-up time - 100 (6) - - ns t r rise time of both sda and scl - 20+0.1c b (7 ) - 300 ns t f fall time of both sda and scl - 20+0.1c b (7 ) - 300 ns t su;sto set-up time for stop condition - 0.6 - - s t buf bus free time between a stop and start condition - 1.3 - - s c b capacitive load for each bus line - - - 400 pf v nl noise margin at the low level for each connected device (including hysteresis) - - 0.1* vddm - v v nh noise margin at the high level for each connected device (including hysteresis) - - 0.2* vddm - v t sp pulse width of spikes suppressed by the input filter - - - 50 ns miscellaneous rpull programmable pull-up/down resistors for io[0-7] - - 42 - k internal (sx1507qb) 1.1 2 3 internal (sx1508/9qb) 1.3 2 2.6 f osc oscillator frequency external from oscin (40-60% duty cycle) - - 2.6 mhz (1) assuming no load connected to outputs and inputs fi xed to vcc1,2 or gnd. (2) can be increased by tying together and driving simu ltaneously several i/os. (3) all values referred to vih mr min and vil m max levels. (4) a device must internally provide a hold time of at least 300ns for the sda signal (referred to vih mr min ) to bridge the undefined region of the falling edge of scl. (5) the maximum t hd;dat has only to be met if the device does not stretch t he low period (t low ) of the scl signal. (6) a fast-mode i 2 c-bus device can be used in a standard-mode i 2 c-bus system, but the requirement t su;dat 3 250 ns must then be met. this will automatically be the case if the device d oes not stretch the low period of the scl signal. if such a device does stretch the low period of the scl signal, it must output the next data bit to th e sda line t r max + t su;dat = 1000 + 250 = 1250 ns (according to the standard-mode i2c-bus s pecification) before the scl line is released. (7) c b = total capacitance of one bus line in pf. if mixe d with hs-mode devices, faster fall-times are allow ed. (8) sx1508/9qb: with reghighinput bit enabled (vccx min =1.65v), else 3.6v (vccx min = 1.2v) table 6 C electrical specifications
advanced communications & sensing rev 3 C 9 th sept. 2010 11 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 3 t ypical o perating c haracteristics figure 4 C typical operating characteristics fosc vs.temperature (vddm = 3.6v) 1.3 1.5 1.7 1.9 2.1 2.3 2.5 -50 -30 -10 10 30 50 70 90 temp ( o c) f o s c ( m h z ) sx1509qb iddm vs.vddm (oscillator enabled) 100 120 140 160 180 200 220 240 260 280 300 320 340 360 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 vddm (v) i d d m ( u a ) vol vs.temperature (vccx = 3.6v, iol = 15ma) 0 0.05 0.1 0.15 0.2 0.25 0.3 -50 -30 -10 10 30 50 70 90 temp ( o c) v o l ( v ) voh vs. temperature (vccx = 3.6v, ioh = 8ma) 3.2 3.25 3.3 3.35 3.4 3.45 3.5 3.55 3.6 -50 -30 -10 10 30 50 70 90 temp ( o c) v o h ( v ) sx1509qb iddm vs.vddm (oscillator enabled) 100 120 140 160 180 200 220 240 260 280 300 320 340 360 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 vddm (v) i d d m ( u a ) voh vs. ioh (vddm = 3.6v, temp 25c) 3.2 3.25 3.3 3.35 3.4 3.45 3.5 3.55 3.6 -8 -7 -6 -5 -4 -3 -2 -1 0 ioh (ma) v o h ( v ) vol vs. iol (vccx = 3.6v, temp 25c) 0 0.05 0.1 0.15 0.2 0.25 0.3 0 2 4 6 8 10 12 14 iol (ma) v o l ( v ) fosc vs. vddm 1.3 1.5 1.7 1.9 2.1 2.3 2.5 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 vddm (v) f o s c ( m h z )
advanced communications & sensing rev 3 C 9 th sept. 2010 12 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 4 b lock d etailed d escription 4.1 sx1507qb 4-channel i 2 c gpio with led driver input filter reset vddm i 2 c bus control nreset scl sda interrupt 4-bit vcc1 i/o[0] i/o[1] i/o[2] i/o[3] r/w gnd led driver blink (timer) breathe (ramp) intensity (pwm) clock mgmt internal oscillator i/o bank a a sx1507 q b nint oscio external clock addr1 addr0 figure 5 C 4-channel low voltage gpio with led driv er 4.2 sx1508qb 8-channel i 2 c gpio with led driver and keypad engine input filter reset vddm i 2 c bus control vcc1 nreset scl sda interrupt 8-bit i/o[0] i/o[1] i/o[2] i/o[3] r/w i/o[4] i/o[5] i/o[6] i/o[7] addr1 gnd vcc2 led driver blink (timer) breathe (ramp) intensity (pwm) clock mgmt internal oscillator external clock i/o bank a a i/o bank b a sx1508 q b nint oscio addr0 keypad engine 16 keys max figure 6 C 8-channel low voltage gpio with led driv er and keypad engine
advanced communications & sensing rev 3 C 9 th sept. 2010 13 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 4.3 sx1509qb 16-channel i 2 c gpio with led driver and keypad engine i 2 c bus control vcc1 input filter reset vddm nreset scl sda interrupt 8-bit r/w i/o[0] i/o[1] i/o[2] i/o[3] i/o[4] i/o[5] i/o[6] i/o[7] gnd vcc2 led driver blink (timer) breathe (ramp) intensity (pwm) clock mgmt internal oscillator external clock i/o bank a a i/o bank b a sx1509 q b i/o[8] i/o[9] i/o[10] i/o[11] i/o[12] i/o[13] i/o[14] i/o[15] 8-bit r/w nint oscio a ddr1 addr0 keypad engine 64 keys max auto sleep/wakeup figure 7 C 16-channel low voltage gpio with led dri ver and keypad engine 4.4 reset 4.4.1 hardware (nreset) the sx1507qb, sx1508qb and sx1509qb generate their own power on reset signal after a power supply is connected to the vddm pin. nreset input pin can be used to reset the chip anytime, it must be connecte d to vddm (or greater) either directly (if not used), or via a resistor. figure 8 C power-on / brown-out reset conditions 1. device behavior is undefined until vddm rises ab ove vpor, at which point internal reset procedure i s started. 2. after t reset , the reset procedure is completed. 3. in operation, the sx1507qb, sx1508qb and sx1509q b may be reset (por like or led driver counters only depending on regmisc setting) at anytime by an external device driving nreset low for t pulse or longer. chip can be accessed normally again after nreset rising edge.
advanced communications & sensing rev 3 C 9 th sept. 2010 14 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 4. during a brown-out event, if vddm drops above vd roph a reset will not occur. 5. during a brown-out event, if vddm drops between vdroph and vdropl a reset may occur. 6. during a brown-out event, if vddm drops below vd ropl a reset will occur next time vpor is crossed. please note that a brown-out event is defined as a transient event on vddm. if vddm is attached to a b attery, then the gradual decay of the battery voltage will not be interpreted as a brown-out event. please also note that a sharp rise in vddm (> 1v/us ) may induce a circuit reset. 4.4.2 software (regreset) writing consecutively 0x12 and 0x34 to regreset reg ister will reset all registers to their default val ues. 4.5 2-wire interface (i 2 c) the sx1507qb, sx1508qb and sx1509qb 2-wire interfac e operates only in slave mode. in this configuratio n, the device has one or 4 possible devices addresses defined by addr[1:0] pins: device addr[1:0] address description 00 0x2 0 (01000 00 ) first address of the 2-wire interface 01 0x2 1 (01000 01 ) second address of the 2-wire interface 10 0x2 2 (01000 10 ) third address of the 2-wire interface sx1508qb 11 0x2 3 (01000 11 ) fourth address of the 2-wire interface 00 0x3e ( 0 11111 0 ) first address of the 2-wire interface 01 0x3f ( 0 11111 1 ) second address of the 2-wire interface 10 0x70 ( 1 11000 0 ) third address of the 2-wire interface sx1507qb & sx1509qb 11 0x71 ( 1 11000 1 ) fourth address of the 2-wire interface table 7 - 2-wire interface address 2 lines are used to exchange data between an extern al master host and the slave device: scl : s erial cl ock sda : s erial da ta the sx1507qb, sx1508qb and sx1509qb are read-write slave-mode i 2 c devices and comply with the philips i 2 c standard version 2.1 dated january, 2000. the sx1 507qb, sx1508qb and sx1509qb have a few user- accessible internal 8-bits registers to set the var ious parameters of operation (cf. 5 for detailed c onfiguration registers description). the i 2 c interface has been designed for program flexibili ty, in that once the slave address has been sent to the sx1507qb, sx1508qb or sx1509qb enabling it to be a slave transmitter/receiver, an y register can be written or read independently of ea ch other. the start and stop commands frame the dat a-packet and the repeat start condition is allowed if necess ary. seven bit addressing is used and ten bit addressing is not allowed. any general call address will be i gnored by the sx1507qb, sx1508qb and sx1509qb. the sx1507qb, sx1508qb and sx1509qb are not cbus compatible and can operate in standard mode (100kbi t/s) or fast mode (400kbit/s). 4.5.1 write after the start condition [s], the slave address (s a) is sent, followed by an eighth bit (0) indicat ing a write. the slave then acknowledges [a] that it is being addres sed, and the master sends an 8 bit data byte consis ting of the slave register address (ra). the slave acknowle dges [a] and the master sends the appropriate 8 bit data byte (wd0). again the slave acknowledges [a]. in ca se the master needs to write more data, a succeedin g 8 bit data byte will follow (wd1), acknowledged by the sl ave [a]. this sequence will be repeated until the m aster terminates the transfer with the stop condition [p] . figure 9 - 2-wire serial interface, write operation
advanced communications & sensing rev 3 C 9 th sept. 2010 15 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine when successive register data (wd1...wdn) is suppli ed by the master, the register address can be automatically incremented or kept fixed depending o n the setting programmed in regmisc. 1 t pv figure 10 C example: write regdata register 4.5.2 read after the start condition [s], the slave address (s a) is sent, followed by an eighth bit (0) indicat ing a write. the slave then acknowledges [a] that it is being addres sed, and the master responds with an 8 bit data con sisting of the register address (ra). the slave acknowledges [ a] and the master sends the repeated start conditio n [sr]. once again, the slave address (sa) is sent, f ollowed by an eighth bit (1) indicating a read. the slave responds with an acknowledge [a] and the read data byte (rd0). if the master needs to read m ore data it will acknowledge [a] and the slave will sen d the next read byte (rd1). this sequence can be re peated until the master terminates with a nack [n] followe d by a stop [p]. figure 11 - 2-wire serial interface, read operation when successive register data (rd1...rdn) is read b y the master, the register address will be automati cally incremented or kept fixed depending on the setting programmed in regmisc. 4.6 i/o banks 4.6.1 input debouncer each input can be individually debounced by setting corresponding bits in regdebounce register. at pow er up the debounce function is disabled. after enabling t he debouncer, the change of the input value is acce pted only if the input value is identical at two consecutive sam pling times. the debounce time common to all ios can be set in r egdebounceconfig register from 0.5 to 64ms (fosc = 2mhz). 4.6.2 keypad scanning engine sx1508qb, and sx1509qb integrate a fully programmab le keypad scanning engine to implement keypad applications up to 8x8 matrix (i.e. 64 keys). please note that sx1509qb also implements an auto s leep/wakeup feature to save power consumption when no key has been pressed for a programmed time.
advanced communications & sensing rev 3 C 9 th sept. 2010 16 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine io3 io2 io1 io0 io4 io5 io6 io7 sx1508qb - io[3-0] as outputs (scanning) - io[7-4] as inputs x y regkey data = x y figure 12 C 4x4 keypad connection to sx1508qb following procedure should be implemented on the ho st controller for a 4x4 keypad: 1. set regdir to 0xf0 (io[3-0] as outputs, io[7-4] as inputs) , set regopendrain to 0x0f (io[3-0] as o pen-drain outputs), set regpullup to 0xf0 (pull-ups enabled o n inputs io[7-4]). 2. enable and configure debouncing on io[7-4] (regd ebounceenable = 0xf0, ex : regdebounceconfig = 0x05 ) 3. enable and configure keypad scanning engine (ex : regkeyconfig = 0x7d) this will start an infinite loop with the following sequence to io[3:0]: zzz0, zz0z, z0zz , 0zzz. make sure that scan interval is set to high er value than the debounce time. 4. when a key is pressed, nint goes low, key scan i s halted and the key coordinates are stored in regk eydata: the column data will be stored in regkeydata[7:4] ( note: column indication is active low) the row data will be stored in regkeydata[3:0] (no te: row indication is active low) when regkeydata is read, this data along with the i nterrupt is automatically cleared (same behavior as reading regdata) and the key scan continues to t he next row. 5. restart from point 4. this implementation allows the host to handle both single and multi-touches easily (fast aaaaaa sequen ce is a long press of key a, fast abababab sequence is key a and key b pressed together, etc) 4.6.3 level shifter because of their 5.5v tolerant i/o banks with indep endent supply voltages between 1.2v and 3.6v, the sx1508qb and sx1509qb can perform level shifting of signals from one i/o bank to another without uc activity by programming the corresponding configuration reg ister bits accordingly in reglevelshifter (and regdir). this can save significant bom cost in a final appli cation where only a few signals need to be level-sh ifted (no need for an additional external level shifter ic). vcc1 io0 1.2-3.6v sx1508/9qb vcc2 io4 1.2-3.6v 1.2-5.5v 1.2-3.6v tlevelshiftmin figure 13 C level shifting example
advanced communications & sensing rev 3 C 9 th sept. 2010 17 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine the minimum pulse width tlevelshiftmin which can be level shifted properly depends on vccx and vddm: tlevelshiftmin = input delay + core delay + output delay input/core/output delays vs vccx/vddm are given in figures below. figure 14 C level shifter max frequency calculation data 4.6.4 polarity inverter each ios polarity can be individually inverted by setting corresponding bit in regpolarity register. please note that polarity inversion can also be combined with l evel shifting feature. 4.7 interrupt (nint) at start-up, the transition detection logic is rese t, and nint is released to a high-impedance state. the interrupt mask register is set to 0xff, disabling the interru pt output for transitions on all i/o ports. the tra nsition flags are cleared to indicate no data changes. an interrupt nint can be generated on any programme d combination of i/os rising and/or falling edges t hrough the reginterruptmask and regsense registers. if needed, the i/os which triggered the interrupt c an then be identified by reading reginterruptsource register. sx1509qb digital core delay vs. supply voltage 14 16 18 20 22 24 26 28 1 1.5 2 2.5 3 3.5 vddm (v) tdelay (ns) typical worst case io input delay vs. supply voltage 0.000 1.000 2.000 3.000 4.000 5.000 6.000 7.000 8.000 9.000 10.000 1.000 1.500 2.000 2.500 3.000 3.500 vccx (v) tdelay (ns) typical worst case sx1508qb digital core delay vs. supply voltage 14 16 18 20 22 24 26 28 1 1.5 2 2.5 3 3.5 vddm (v) tdelay (ns) typical worst case io output delay vs. supply voltage ( lowdriveen=0, 20pf load) 0.000 20.000 40.000 60.000 80.000 100.000 120.000 140.000 1.000 1.500 2.000 2.500 3.000 3.500 vccx (v) tdelay (ns) typical worst case io output delay vs. supply voltage (lowdriveen=1, 2 0pf load) 0.000 20.000 40.000 60.000 80.000 100.000 120.000 140.000 1.000 1.500 2.000 2.500 3.000 3.500 vccx (v) tdelay (ns) typical worst case
advanced communications & sensing rev 3 C 9 th sept. 2010 18 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine when nint is low (i.e. interrupt occurred), it can be reset back high (i.e. cleared) by writing 0xff i n reginterruptsource (this will also clear correspond ing bits in regeventstatus register). the interrupt can also be cleared automatically whe n reading regdata register (cf. regmisc) example: we want to detect rising edge of i/o[1] on sx1508qb (nint will go low). 1. we enable interrupt on i/o[1] in reginterruptmas k reginterruptmask =xxxxxx 0 x 2. we set edge sense for i/o[1] in regsense regsenselow =xxxx 01 xx please note that independently from the user defin ed process described above the keypad engine, when enabled, also uses nint to indicate a key press. hence we have nint = user defined condition occurr ed or keypad engine condition occurred. 4.8 clock management a main oscillator clock fosc is needed by the led d river, keypad engine and debounce features. clock management block is illustrated in figure bel ow. oscio clock mgmt internal oscillator external clock fosc div figure 15 C clock management overview the block is configured in register regclock (cf 5 for more detailed information): selection of internal clock source: none (off) or internal oscillator or external clock input from os cin. definition of oscio pin function (oscin or oscout) oscout frequency setting (sub-multiple of fosc) please note that if needed the oscout feature can b e used as an additional gpo (cf. regclock) 4.9 led driver 4.9.1 overview every io has its own independent led driver (cf 6. 2 for typical led connection) , all ios can perform intensity control (pwm) while some of them additionally inclu de blinking and breathing features (cf pin descript ion 1) the led drivers of all i/os share the same clock cl kx configurable in regmisc[6:4]. please note that f or power consumption reasons clkx is off by default. assuming clkx is not off, led driver for io[x] is e nabled when regleddriverenable[x] = 1 in which case it can operate in one of the three modes below: static mode (all i/os, with or without fade in/out ) single shot mode (blinking capable i/os only, with or without fade in/out) blink mode (blinking capable i/os only, with or wi thout fade in/out)
advanced communications & sensing rev 3 C 9 th sept. 2010 19 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine t t 1 0 fade in on fade out off 0 100% trisex tfallx tonx toffx io[x] intensity (pwm value) regdata[x] ioffx ionx figure 16 C led driver overview each io[x] has its own set of programmable register s (cf 5 for more detailed information): regtonx (blinking capable i/os only): tonx, on time of io[x ] regionx (all i/os): ionx, on intensity of io[x] regoffx (blinking capable i/os only): toffx and ioffx, off time and intensity of io[x] regtrisex (breathing capable i/os only): trisex, fade in time of io[x] regtfallx (breathing capable i/os only): tfallx, fade out tim e of io[x] please note that the led driver mode is selectable for each io bank between linear and logarithmic. (c f 4.9.5) all the figures assume normal io polarity, for inve rse polarity regdata control must be inverted (does not invert the polarity of the io signal itself). 4.9.2 static mode only mode available for non blinking capable ios (w ith off intensity = 0), else invoked when tonx = 0. if the i/o doesnt support fading the led intensity will step directly to the ionx/ioffx value. regdata(x) ioled(x) level off intensity(min) determined by register regioffx on intensity(max) determined by register regionx fade in rate determined by register regtrisex fade out rate determined by register regtfallx figure 17 C led driver static mode 4.9.3 single shot mode invoked when tonx != 0 and toffx = 0. if the i/o doesnt support fading the led intensity will step directly to the ionx/ioffx value.
advanced communications & sensing rev 3 C 9 th sept. 2010 20 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine ioled(x) level on intensity(max) off intensity(min) regdata(x) fade in rate determined by register regtrisex minimum intensity duration determined by register regdata(x) fade out rate determined by register regtfallx figure 18 C led driver single shot mode 4.9.4 blink mode invoked when tonx != 0 and toffx != 0. if the i/o doesnt support fading the led intensity will step directly to the ionx/ioffx value. off intensity(min) regdata(x) ioled(x) level fade in rate determined by register regtrisex minimum intensity duration determined by register regtoffx maximum intensity duration determined by register regtonx fade out rate determined by register regtfallx when regdata(x) is cleared, the led will complete any current ramp, and then stay at minimum intensity on intensity(max) figure 19 C led driver blink mode 4.9.5 led driver modes for each io bank, the led driver mode of fading cap able ios can be selected between linear or logarith mic in regmisc. lin. log. lin. log. lin. log. lin. log. lin. log. lin. log. lin. log. lin. log. 0 0 32 4 64 13 96 28 128 53 160 88 192 135 224 198 1 0 33 4 65 13 97 28 129 53 161 88 193 135 225 198 2 0 34 4 66 13 98 30 130 53 162 88 194 135 226 198 3 0 35 4 67 13 99 30 131 53 163 88 195 135 227 198 4 0 36 5 68 14 100 31 132 56 164 93 196 142 228 207 5 0 37 5 69 14 101 31 133 56 165 93 197 142 229 207 6 0 38 5 70 14 102 32 134 56 166 93 198 142 230 207 7 0 39 5 71 14 103 32 135 56 167 93 199 142 231 207 8 1 40 6 72 16 104 34 136 60 168 98 200 150 232 216 9 1 41 6 73 16 105 34 137 60 169 98 201 150 233 216 10 1 42 6 74 17 106 35 138 60 170 98 202 150 234 216 11 1 43 6 75 17 107 35 139 60 171 98 203 150 235 216 12 1 44 7 76 18 108 36 140 65 172 104 204 157 236 225
advanced communications & sensing rev 3 C 9 th sept. 2010 21 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 13 1 45 7 77 18 109 36 141 65 173 104 205 157 237 225 14 1 46 7 78 19 110 38 142 65 174 104 206 157 238 225 15 1 47 7 79 19 111 38 143 65 175 104 207 157 239 225 16 2 48 8 80 20 112 39 144 69 176 110 208 165 240 235 17 2 49 8 81 20 113 39 145 69 177 110 209 165 241 235 18 2 50 8 82 21 114 41 146 69 178 110 210 165 242 235 19 2 51 8 83 21 115 41 147 69 179 110 211 165 243 235 20 2 52 9 84 22 116 42 148 73 180 116 212 172 244 245 21 2 53 9 85 22 117 42 149 73 181 116 213 172 245 245 22 2 54 9 86 23 118 44 150 73 182 116 214 172 246 245 23 2 55 9 87 23 119 44 151 73 183 116 215 172 247 245 24 3 56 10 88 24 120 46 152 78 184 122 216 181 248 255 25 3 57 10 89 24 121 46 153 78 185 122 217 181 249 255 26 3 58 10 90 25 122 46 154 78 186 122 218 181 250 255 27 3 59 10 91 25 123 46 155 78 187 122 219 181 251 255 28 3 60 11 92 26 124 49 156 83 188 129 220 189 252 255 29 3 61 11 93 26 125 49 157 83 189 129 221 189 253 255 30 3 62 12 94 27 126 49 158 83 190 129 222 189 254 255 31 3 63 12 95 27 127 49 159 83 191 129 223 189 255 255 table 8 C led driver linear vs logarithmic function (i) 0 50 100 150 200 250 300 1 10 19 28 37 46 55 64 73 82 91 100 109 118 127 136 145 154 163 172 181 190 199 208 217 226 235 244 253 region (4xregoff[2:0]) ion (ioff) linear mode log mode figure 20 C led driver linear vs logarithmic functi on (ii) 4.9.6 synchronization of led drivers across several ics when several gpio expanders are used in the same ap plication it may be useful that their leds drivers are synchronous for coherent global operation. in this case all ics should share their fosc throug h their oscio pins and have their reset connected t ogether. when regmisc of each ic is set accordingly, nreset signal can then be used to reset all devices inter nal counters (but not the register settings) and allow synchronous led operation (blinking, fading) across multiple devices. 4.9.7 tutorial below are the steps required to use the led driver with the typical led connection described 6.2: - disable input buffer (reginputdisable) - disable pull-up (regpullup)
advanced communications & sensing rev 3 C 9 th sept. 2010 22 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine - enable open drain (regopendrain) - set direction to output (regdir) C by default reg data is set high => led off - enable oscillator (regclock) - configure led driver clock and mode if relevant ( regmisc) - enable led driver operation (regleddriverenable) - configure led driver parameters (regton, region, regoff, regtrise, regtfall) - set regdata bit low => led driver started
advanced communications & sensing rev 3 C 9 th sept. 2010 23 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 5 c onfiguration r egisters 5.1 sx1507qb 4-channel gpio with led driver address name description default device and io banks 0x00 reginputdisable input buffer disable register xxxx 0000 0x01 reglongslew output buffer long slew register xxxx 0000 0x02 reglowdrive output buffer low drive register xxxx 0000 0x03 regpullup pull-up register xxxx 0000 0x04 regpulldown pull-down register xxxx 0000 0x05 regopendrain open drain register xxxx 0000 0x06 regpolarity polarity register xxxx 0000 0x07 regdir direction register xxxx 1111 0x08 regdata data register xxxx 1111 * 0x09 reginterruptmask interrupt mask register xxxx 1111 0x0a regsense sense register 0000 0000 0x0b reginterruptsource interrupt source register xxxx 0000 0x0c regeventstatus event status register xxxx 0000 0x0d regclock clock management register 0000 0000 0x0e regmisc miscellaneous device settings register 0000 0000 0x0f regleddriverenable led driver enable register xxxx 0000 debounce 0x10 regdebounceconfig debounce configuration register 0000 0000 0x11 regdebounceenable debounce enable register xxxx 0000 led driver (pwm, blinking, breathing) 0x12 regton0 on time register for i/o[0] 0000 0000 0x13 region0 on intensity register for i/o[0] 1111 1111 0x14 regoff0 off time/intensity register for i/o[0] 0000 0000 0x15 regton1 on time register for i/o[1] 0000 0000 0x16 region1 on intensity register for i/o[1] 1111 1111 0x17 regoff1 off time/intensity register for i/o[1] 0000 0000 0x18 regtrise1 fade in register for i/o[1] 0000 0000 0x19 regtfall1 fade out register for i/o[1] 0000 0000 0x1a regton2 on time register for i/o[2] 0000 0000 0x1b region2 on intensity register for i/o[2] 1111 1111 0x1c regoff2 off time/intensity register for i/o[2] 0000 0000 0x1d regtrise2 fade in register for i/o[2] 0000 0000 0x1e regtfall2 fade out register for i/o[2] 0000 0000 0x1f regton3 on time register for i/o[3] 0000 0000 0x20 region3 on intensity register for i/o[3] 1111 1111 0x21 regoff3 off time/intensity register for i/o[3] 0000 0000 0x22 regtrise3 fade in register for i/o[3] 0000 0000 0x23 regtfall3 fade out register for i/o[3] 0000 0000 software reset 0x7d regreset software reset register 0000 0000 test (not to be written) 0x7e regtest1 test register 0000 0000 0x7f regtest2 test register 0000 0000 *bits set as output take 1 as defau lt value. table 9 C sx1507qb configuration registers overview
advanced communications & sensing rev 3 C 9 th sept. 2010 24 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine addr name default bits description 7:4 unused 0x00 reginputdisable 0xx0 3:0 disables the input buffer of each io 0 : input buffer is enabled (input actually being u sed) 1 : input buffer is disabled (input actually not be ing used or led connection) 7:4 unused 0x01 reglongslew 0xx0 3:0 enables increased slew rate of the output buffer of each [output-configured] io 0 : increased slew rate is disabled 1 : increased slew rate is enabled 7:4 unused 0x02 reglowdrive 0xx0 3:0 enables reduced drive of the output buffer of each [output-configured] io 0 : reduced drive is disabled 1 : reduced drive is enabled. iol specifications ar e divided by 2. 7:4 unused 0x03 regpullup 0xx0 3:0 enables the pull-up for each io 0 : pull-up is disabled 1 : pull-up is enabled 7:4 unused 0x04 regpulldown 0xx0 3:0 enables the pull-down for each io 0 : pull-down is disabled 1 : pull-down is enabled 7:4 unused 0x05 regopendrain 0xx0 3:0 enables open drain operation for each [output-confi gured] io 0 : regular push-pull operation 1 : open drain operation 7:4 unused 0x06 regpolarity 0xx0 3:0 enables polarity inversion for each io 0 : normal polarity : regdata[x] = io[x] 1 : inverted polarity : regdata[x] = !io[x] (for bo th input and output configured ios) 7:4 unused 0x07 regdir 0xxf 3:0 configures direction for each io. 0 : io is configured as an output 1 : io is configured as an input 7:4 unused 0x08 regdata 0xxf 3:0 write: data to be output to the output-configured i os read: data seen at the ios, independent of the dire ction configured. 7:4 unused 0x09 reginterruptmask 0xxf 3:0 configures which [input-configured] io will trigger an interrupt on nint pin 0 : an event on this io will trigger an interrupt 1 : an event on this io will not trigger an interru pt 7:6 edge sensitivity of regdata[3] 5:4 edge sensitivity of regdata[2] 3:2 edge sensitivity of regdata[1] 0x0a regsense 0x00 1:0 edge sensitivity of regdata[0] 00 : none 01 : rising 10 : falling 11 : both 7:4 unused 0x0b reginterruptsource 0xx0 3:0 interrupt source (from ios set in reginterruptmask) 0 : no interrupt has been triggered by this io 1 : an interrupt has been triggered by this io (an event as configured in relevant regsense register occured). writing '1' clears the bit in reginterruptsource an d in regeventstatus when all bits are cleared, nint signal goes back hi gh. 7:4 unused 0x0c regeventstatus 0xx0 3:0 event status of all ios. 0 : no event has occured on this io 1 : an event has occured on this io (an edge as con figured in relevant regsense register occured). writing '1' clears the bit in regeventstatus and in reginterruptsource if relevant. if the edge sensitivity of the io is changed, the b it(s) will be cleared automatically 7 unused 6:5 oscillator frequency (fosc) source 00 : off. led driver and debounce features are disa bled. 01 : external clock input (oscin) 10 : internal 1mhz oscillator 11 : reserved 4 oscio pin function (cf. 4.8) 0 : oscio is an input (oscin) 1 : oscio is an output (oscout) 0x0d regclock 0x00 3:0 frequency of the signal output on oscout pin: 0x0 : 0hz, permanent "0" logical level (gpo) 0xf : 0hz, permanent "1" logical level (gpo) else : foscout = fosc/(2^(regclock[3:0]-1))
advanced communications & sensing rev 3 C 9 th sept. 2010 25 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 7 unused 6:4 frequency of the led driver clock clkx of all ios: 0 : off. led driver functionality is disabled for a ll ios. else : clkx = fosc/(2^(regmisc[6:4]-1)) 3 led driver mode for bank a s fading capable ios (i o1-3) 0: linear 1: logarithmic 2 nreset pin function when externally forced low (cf. 4.4.1 and 4.9.5). 0: equivalent to por 1: reset pwm/blink/fade counters (not user programm ed values) this bit is can only be reset manually or by por, n ot by nreset. 1 auto-increment register address (cf. 4.5) 0: on. when several consecutive data are read/writt en, register address is incremented. 1: off. when several consecutive data are read/writ ten, register address is kept fixed. 0x0e regmisc 0x00 0 autoclear nint on regdata read (cf. 4.7) 0: on. reginterruptsource is also automatically cle ared when regdata is read. 1: off. reginterruptsource must be manually cleared , either directly or via regeventstatus. 7:4 unused 0x0f regleddriverenable 0xx0 3:0 enables led driver for each [output-configured] io 0 : led driver is disabled 1 : led driver is enabled 7:3 unused 0x10 regdebounceconfig 0x00 2:0 debounce time (cf. 4.6.1) 000: 0.5ms x 1mhz/fosc 001: 1ms x 1mhz/fosc 010: 2ms x 1mhz/fosc 011: 4ms x 1mhz/fosc 100: 8ms x 1mhz/fosc 101: 16ms x 1mhz/fosc 110: 32ms x 1mhz/fosc 111: 64ms x 1mhz/fosc 7:4 unused 0x11 regdebounceenable 0xx0 3:0 enables debouncing for each [input-configured] io 0 : debouncing is disabled 1 : debouncing is enabled 7:5 unused 0xxx regtonx 0x00 4:0 on time of io[x]: 0 : infinite (static mode, ton directly controlled by regdata, cf 4.9.2) 1 - 15 : tonx = 64 * regtonx * (255/clkx) 16 - 31 : tonx = 512 * regtonx * (255/clkx) 0xxx regionx 0xff 7:0 on intensity of io[x] - linear mode : ionx = regionx - logarithmic mode (fading capable ios only) : ionx = f(regionx) , cf 4.9.5 7:3 off time of io[x]: 0 : infinite (single shot mode, toff directly contr olled by regdata, cf 4.9.3) 1 - 15 : toffx = 64 * regoffx[7:3] * (255/clkx) 16 - 31 : toffx = 512 * regoffx[7:3] * (255/clkx) 0xxx regoffx 0x00 2:0 off intensity of io[x] - linear mode : ioffx = 4 x regoff[2:0] - logarithmic mode (fading capable ios only) : ioff x = f(4 x regoffx[2:0]) , cf 4.9.5 7:5 unused 0xxx regtrisex 0x00 4:0 fade in setting of io[x] 0 : off 1 - 15 : trisex = (regionx-(4xregoffx[2:0])) * regt risex * (255/clkx) 16 - 31 : trisex = 16 * (regionx-(4xregoffx[2:0])) * regtrisex * (255/clkx) 7:5 unused 0xxx regtfallx 0x00 4:0 fade out setting of io[x] 0 : off 1 - 15 : tfallx = (regionx-(4xregoffx[2:0])) * regt fallx * (255/clkx) 16 - 31 : tfallx = 16 * (regionx-(4xregoffx[2:0])) * regtfallx * (255/clkx) 0x7d regreset 0x00 7:0 software reset register writing consecutively 0x12 and 0x34 will reset the device (same as por). always reads 0. table 10 C sx1507qb configuration registers descrip tion
advanced communications & sensing rev 3 C 9 th sept. 2010 26 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 5.2 sx1508qb 8-channel gpio with led driver and key pad engine address name description default device and io banks 0x00 reginputdisable input buffer disable register 0000 0000 0x01 reglongslew output buffer long slew register 0000 0000 0x02 reglowdrive output buffer low drive register 0000 0000 0x03 regpullup pull-up register 0000 0000 0x04 regpulldown pull-down register 0000 0000 0x05 regopendrain open drain register 0000 0000 0x06 regpolarity polarity register 0000 0000 0x07 regdir direction register 1111 1111 0x08 regdata data register 1111 1111 * 0x09 reginterruptmask interrupt mask register 1111 1111 0x0a regsensehigh sense register for i/o[7:4] 0000 0000 0x0b regsenselow sense register for i/o[3:0] 0000 0000 0x0c reginterruptsource interrupt source register 0000 0000 0x0d regeventstatus event status register 0000 0000 0x0e reglevelshifter level shifter register 0000 0000 0x0f regclock clock management register 0000 0000 0x10 regmisc miscellaneous device settings register 0000 0000 0x11 regleddriverenable led driver enable register 0000 0000 debounce and keypad engine 0x12 regdebounceconfig debounce configuration register 0000 0000 0x13 regdebounceenable debounce enable register 0000 0000 0x14 regkeyconfig key scan configuration register 0000 0000 0x15 regkeydata key value 1111 1111 led driver (pwm, blinking, breathing) 0x16 region0 on intensity register for i/o[0] 1111 1111 0x17 region1 on intensity register for i/o[1] 1111 1111 0x18 regton2 on time register for i/o[2] 0000 0000 0x19 region2 on intensity register for i/o[2] 1111 1111 0x1a regoff2 off time/intensity register for i/o[2] 0000 0000 0x1b regton3 on time register for i/o[3] 0000 0000 0x1c region3 on intensity register for i/o[3] 1111 1111 0x1d regoff3 off time/intensity register for i/o[3] 0000 0000 0x1e regtrise3 fade in register for i/o[3] 0000 0000 0x1f regtfall3 fade out register for i/o[3] 0000 0000 0x20 region4 on intensity register for i/o[4] 1111 1111 0x21 region5 on intensity register for i/o[5] 1111 1111 0x22 regton6 on time register for i/o[6] 0000 0000 0x23 region6 on intensity register for i/o[6] 1111 1111 0x24 regoff6 off time/intensity register for i/o[6] 0000 0000 0x25 regton7 on time register for i/o[7] 0000 0000 0x26 region7 on intensity register for i/o[7] 1111 1111 0x27 regoff7 off time/intensity register for i/o[7] 0000 0000 0x28 regtrise7 fade in register for i/o[7] 0000 0000 0x29 regtfall7 fade out register for i/o[7] 0000 0000 miscellaneous 0x2a reghighinput high input enable register 0000 0000 software reset 0x7d regreset software reset register 0000 0000 test (not to be written) 0x7e regtest1 test register 0000 0000 0x7f regtest2 test register 0000 0000 *bits set as output take 1 as defau lt value. table 11 C sx1508qb configuration registers overvie w
advanced communications & sensing rev 3 C 9 th sept. 2010 27 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine addr name default bits description 0x00 reginputdisable 0x00 7:0 disables the input buffer of each io 0 : input buffer is enabled (input actually being u sed) 1 : input buffer is disabled (input actually not be ing used or led connection) 0x01 reglongslew 0x00 7:0 enables increased slew rate of the output buffer of each [output-configured] io 0 : increased slew rate is disabled 1 : increased slew rate is enabled 0x02 reglowdrive 0x00 7:0 enables reduced drive of the output buffer of each [output-configured] io 0 : reduced drive is disabled 1 : reduced drive is enabled. iol specifications ar e divided by 2. 0x03 regpullup 0x00 7:0 enables the pull-up for each io 0 : pull-up is disabled 1 : pull-up is enabled 0x04 regpulldown 0x00 7:0 enables the pull-down for each io 0 : pull-down is disabled 1 : pull-down is enabled 0x05 regopendrain 0x00 7:0 enables open drain operation for each [output-confi gured] io 0 : regular push-pull operation 1 : open drain operation 0x06 regpolarity 0x00 7:0 enables polarity inversion for each io 0 : normal polarity : regdata[x] = io[x] 1 : inverted polarity : regdata[x] = !io[x] (for bo th input and output configured ios) 0x07 regdir 0xff 7:0 configures direction for each io. 0 : io is configured as an output 1 : io is configured as an input 0x08 regdata 0xff 7:0 write: data to be output to the output-configured i os read: data seen at the ios, independent of the dire ction configured. 0x09 reginterruptmask 0xff 7:0 configures which [input-configured] io will trigger an interrupt on nint pin 0 : an event on this io will trigger an interrupt 1 : an event on this io will not trigger an interru pt 7:6 edge sensitivity of regdata[7] 5:4 edge sensitivity of regdata[6] 3:2 edge sensitivity of regdata[5] 0x0a regsensehigh 0x00 1:0 edge sensitivity of regdata[4] 00 : none 01 : rising 10 : falling 11 : both 7:6 edge sensitivity of regdata[3] 5:4 edge sensitivity of regdata[2] 3:2 edge sensitivity of regdata[1] 0x0b regsenselow 0x00 1:0 edge sensitivity of regdata[0] 00 : none 01 : rising 10 : falling 11 : both 0x0c reginterruptsource 0x00 7:0 interrupt source (from ios set in reginterruptmask) 0 : no interrupt has been triggered by this io 1 : an interrupt has been triggered by this io (an event as configured in relevant regsense register occured). writing '1' clears the bit in reginterruptsource an d in regeventstatus when all bits are cleared, nint signal goes back hi gh. 0x0d regeventstatus 0x00 7:0 event status of all ios. 0 : no event has occured on this io 1 : an event has occured on this io (an edge as con figured in relevant regsense register occured). writing '1' clears the bit in regeventstatus and in reginterruptsource if relevant. if the edge sensitivity of the io is changed, the b it(s) will be cleared automatically 7:6 level shifter mode for io[3] (bank a) and io[7] (bank b) 5:4 level shifter mode for io[2] (bank a) and io[6] (bank b) 3:2 level shifter mode for io[1] (bank a) and io[5] (bank b) 0x0e reglevelshifter 0x00 1:0 level shifter mode for io[0] (bank a) and io[4] (bank b) 00 : off 01 : a->b 10 : b->a 11 : reserved 7 unused 6:5 oscillator frequency (fosc) source 00 : off. led driver, keypad engine and debounce fe atures are disabled. 01 : external clock input (oscin) 10 : internal 2mhz oscillator 11 : reserved 4 oscio pin function (cf. 4.8) 0 : oscio is an input (oscin) 1 : oscio is an output (oscout) 0x0f regclock 0x00 3:0 frequency of the signal output on oscout pin: 0x0 : 0hz, permanent "0" logical level (gpo) 0xf : 0hz, permanent "1" logical level (gpo) else : foscout = fosc/(2^(regclock[3:0]-1)) 0x10 regmisc 0x00 7 led driver mode for bank b s fading capable ios (i o7) 0: linear 1: logarithmic
advanced communications & sensing rev 3 C 9 th sept. 2010 28 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 6:4 frequency of the led driver clock clkx of all ios: 0 : off. led driver functionality is disabled for a ll ios. else : clkx = fosc/(2^(regmisc[6:4]-1)) 3 led driver mode for bank a s fading capable ios (i o3) 0: linear 1: logarithmic 2 nreset pin function when externally forced low (cf. 4.4.1 and 4.9.5). 0: equivalent to por 1: reset pwm/blink/fade counters (not user programm ed values) this bit is can only be reset manually or by por, n ot by nreset. 1 auto-increment register address (cf. 4.5) 0: on. when several consecutive data are read/writt en, register address is incremented. 1: off. when several consecutive data are read/writ ten, register address is kept fixed. 0 autoclear nint on regdata read (cf. 4.7) 0: on. reginterruptsource is also automatically cle ared when regdata is read. 1: off. reginterruptsource must be manually cleared , either directly or via regeventstatus. 0x11 regleddriverenable 0x00 7:0 enables led driver for each [output-configured] io 0 : led driver is disabled 1 : led driver is enabled 7:3 unused 0x12 regdebounceconfig 0x00 2:0 debounce time (cf. 4.6.1) 000: 0.5ms x 2mhz/fosc 001: 1ms x 2mhz/fosc 010: 2ms x 2mhz/fosc 011: 4ms x 2mhz/fosc 100: 8ms x 2mhz/fosc 101: 16ms x 2mhz/fosc 110: 32ms x 2mhz/fosc 111: 64ms x 2mhz/fosc 0x13 regdebounceenable 0x00 7:0 enables debouncing for each [input-configured] io 0 : debouncing is disabled 1 : debouncing is enabled 7 unused 6:5 number of rows (outputs) + key scan enable 00 : key scan off 01 : 2 rows C io[0:1] 10 : 3 rows C io[0:2] 11 : 4 rows C io[0:3] 4:3 number of columns (inputs) 00 : 1 column C io[4] 01 : 2 columns C io[4:5] 10 : 3 columns C io[4:6] 11 : 4 columns C io[4:7] 0x14 regkeyconfig 0x00 2:0 scan time per row (must be set above debounce time) . 000 : 1ms x 2mhz/fosc 001 : 2ms x 2mhz/fosc 010 : 4ms x 2mhz/fosc 011 : 8ms x 2mhz/fosc 100 : 16ms x 2mhz/fosc 101 : 32ms x 2mhz/fosc 110 : 64ms x 2mhz/fosc 111 : 128ms x 2mhz/fosc 0x15 regkeydata 0xff 7:0 key which generated nint (active low) ex: regkeydata=11011110 => key [io5;io0] has been p ressed and generated nint when read it is automatically cleared together with nint and key scan continues. 7:5 unused 0xxx regtonx 0x00 4:0 on time of io[x]: 0 : infinite (static mode, ton directly controlled by regdata, cf 4.9.2) 1 - 15 : tonx = 64 * regtonx * (255/clkx) 16 - 31 : tonx = 512 * regtonx * (255/clkx) 0xxx regionx 0xff 7:0 on intensity of io[x] - linear mode : ionx = regionx - logarithmic mode (fading capable ios only) : ionx = f(regionx) , cf 4.9.5 7:3 off time of io[x]: 0 : infinite (single shot mode, toff directly contr olled by regdata, cf 4.9.3) 1 - 15 : toffx = 64 * regoffx[7:3] * (255/clkx) 16 - 31 : toffx = 512 * regoffx[7:3] * (255/clkx) 0xxx regoffx 0x00 2:0 off intensity of io[x] - linear mode : ioffx = 4 x regoff[2:0] - logarithmic mode (fading capable ios only) : ioff x = f(4 x regoffx[2:0]) , cf 4.9.5 7:5 unused 0xxx regtrisex 0x00 4:0 fade in setting of io[x] 0 : off 1 - 15 : trisex = (regionx-(4xregoffx[2:0])) * regt risex * (255/clkx) 16 - 31 : trisex = 16 * (regionx-(4xregoffx[2:0])) * regtrisex * (255/clkx)
advanced communications & sensing rev 3 C 9 th sept. 2010 29 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 7:5 unused 0xxx regtfallx 0x00 4:0 fade out setting of io[x] 0 : off 1 - 15 : tfallx = (regionx-(4xregoffx[2:0])) * regt fallx * (255/clkx) 16 - 31 : tfallx = 16 * (regionx-(4xregoffx[2:0])) * regtfallx * (255/clkx) 0x2a reghighinput 0x00 7:0 enables high input mode for each [input-configured] io 0 : off. vih max = 3.6v and vccx min = 1.2v 1 : on. vih max = 5.5v and vccx min = 1.65v 0x7d regreset 0x00 7:0 software reset register writing consecutively 0x12 and 0x34 will reset the device (same as por). always reads 0. table 12 C sx1508qb configuration registers descrip tion
advanced communications & sensing rev 3 C 9 th sept. 2010 30 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 5.3 sx1509qb 16-channel gpio with led driver and ke ypad engine address name description default device and io banks 0x00 reginputdisableb input buffer disable register - i/o[15-8] (bank b) 0000 0000 0x01 reginputdisablea input buffer disable register - i/o[7-0] (bank a) 0 000 0000 0x02 reglongslewb output buffer long slew register - i/o[15-8] (bank b) 0000 0000 0x03 reglongslewa output buffer long slew register - i/o[7-0] (bank a ) 0000 0000 0x04 reglowdriveb output buffer low drive register - i/o[15-8] (bank b) 0000 0000 0x05 reglowdrivea output buffer low drive register - i/o[7-0] (bank a ) 0000 0000 0x06 regpullupb pull-up register - i/o[15-8] (bank b) 0000 0000 0x07 regpullupa pull-up register - i/o[7-0] (bank a) 0000 0000 0x08 regpulldownb pull-down register - i/o[15-8] (bank b) 0000 0000 0x09 regpulldowna pull-down register - i/o[7-0] (bank a) 0000 0000 0x0a regopendrainb open drain register - i/o[15-8] (bank b) 0000 0000 0x0b regopendraina open drain register - i/o[7-0] (bank a) 0000 0000 0x0c regpolarityb polarity register - i/o[15-8] (bank b) 0000 0000 0x0d regpolaritya polarity register - i/o[7-0] (bank a) 0000 0000 0x0e regdirb direction register - i/o[15-8] (bank b) 1111 1111 0x0f regdira direction register - i/o[7-0] (bank a) 1111 1111 0x10 regdatab data register - i/o[15-8] (bank b) 1111 1111 * 0x11 regdataa data register - i/o[7-0] (bank a) 1111 1111 * 0x12 reginterruptmaskb interrupt mask register - i/o[15-8] (bank b) 1111 1 111 0x13 reginterruptmaska interrupt mask register - i/o[7-0] (bank a) 1111 11 11 0x14 regsensehighb sense register for i/o[15:12] 0000 0000 0x15 regsenselowb sense register for i/o[11:8] 0000 0000 0x16 regsensehigha sense register for i/o[7:4] 0000 0000 0x17 regsenselowa sense register for i/o[3:0] 0000 0000 0x18 reginterruptsourceb interrupt source register - i/o[15-8] (bank b) 0000 0000 0x19 reginterruptsourcea interrupt source register - i/o[7-0] (bank a) 0000 0000 0x1a regeventstatusb event status register - i/o[15-8] (bank b) 0000 000 0 0x1b regeventstatusa event status register - i/o[7-0] (bank a) 0000 0000 0x1c reglevelshifter1 level shifter register 0000 0000 0x1d reglevelshifter2 level shifter register 0000 0000 0x1e regclock clock management register 0000 0000 0x1f regmisc miscellaneous device settings register 0000 0000 0x20 regleddriverenableb led driver enable register - i/o[15-8] (bank b) 000 0 0000 0x21 regleddriverenablea led driver enable register - i/o[7-0] (bank a) 0000 0000 debounce and keypad engine 0x22 regdebounceconfig debounce configuration register 0000 0000 0x23 regdebounceenableb debounce enable register - i/o[15-8] (bank b) 0000 0000 0x24 regdebounceenablea debounce enable register - i/o[7-0] (bank a) 0000 0 000 0x25 regkeyconfig1 key scan configuration register 0000 0000 0x26 regkeyconfig2 key scan configuration register 0000 0000 0x27 regkeydata1 key value (column) 1111 1111 0x28 regkeydata2 key value (row) 1111 1111 led driver (pwm, blinking, breathing) 0x29 regton0 on time register for i/o[0] 0000 0000 0x2a region0 on intensity register for i/o[0] 1111 1111 0x2b regoff0 off time/intensity register for i/o[0] 0000 0000 0x2c regton1 on time register for i/o[1] 0000 0000 0x2d region1 on intensity register for i/o[1] 1111 1111 0x2e regoff1 off time/intensity register for i/o[1] 0000 0000 0x2f regton2 on time register for i/o[2] 0000 0000 0x30 region2 on intensity register for i/o[2] 1111 1111 0x31 regoff2 off time/intensity register for i/o[2] 0000 0000 0x32 regton3 on time register for i/o[3] 0000 0000 0x33 region3 on intensity register for i/o[3] 1111 1111 0x34 regoff3 off time/intensity register for i/o[3] 0000 0000 0x35 regton4 on time register for i/o[4] 0000 0000 0x36 region4 on intensity register for i/o[4] 1111 1111 0x37 regoff4 off time/intensity register for i/o[4] 0000 0000 0x38 regtrise4 fade in register for i/o[4] 0000 0000
advanced communications & sensing rev 3 C 9 th sept. 2010 31 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine address name description default 0x39 regtfall4 fade out register for i/o[4] 0000 0000 0x3a regton5 on time register for i/o[5] 0000 0000 0x3b region5 on intensity register for i/o[5] 1111 1111 0x3c regoff5 off time/intensity register for i/o[5] 0000 0000 0x3d regtrise5 fade in register for i/o[5] 0000 0000 0x3e regtfall5 fade out register for i/o[5] 0000 0000 0x3f regton6 on time register for i/o[6] 0000 0000 0x40 region6 on intensity register for i/o[6] 1111 1111 0x41 regoff6 off time/intensity register for i/o[6] 0000 0000 0x42 regtrise6 fade in register for i/o[6] 0000 0000 0x43 regtfall6 fade out register for i/o[6] 0000 0000 0x44 regton7 on time register for i/o[7] 0000 0000 0x45 region7 on intensity register for i/o[7] 1111 1111 0x46 regoff7 off time/intensity register for i/o[7] 0000 0000 0x47 regtrise7 fade in register for i/o[7] 0000 0000 0x48 regtfall7 fade out register for i/o[7] 0000 0000 0x49 regton8 on time register for i/o[8] 0000 0000 0x4a region8 on intensity register for i/o[8] 1111 1111 0x4b regoff8 off time/intensity register for i/o[8] 0000 0000 0x4c regton9 on time register for i/o[9] 0000 0000 0x4d region9 on intensity register for i/o[9] 1111 1111 0x4e regoff9 off time/intensity register for i/o[9] 0000 0000 0x4f regton10 on time register for i/o[10] 0000 0000 0x50 region10 on intensity register for i/o[10] 1111 1111 0x51 regoff10 off time/intensity register for i/o[10] 0000 0000 0x52 regton11 on time register for i/o[11] 0000 0000 0x53 region11 on intensity register for i/o[11] 1111 1111 0x54 regoff11 off time/intensity register for i/o[11] 0000 0000 0x55 regton12 on time register for i/o[12] 0000 0000 0x56 region12 on intensity register for i/o[12] 1111 1111 0x57 regoff12 off time/intensity register for i/o[12] 0000 0000 0x58 regtrise12 fade in register for i/o[12] 0000 0000 0x59 regtfall12 fade out register for i/o[12] 0000 0000 0x5a regton13 on time register for i/o[13] 0000 0000 0x5b region13 on intensity register for i/o[13] 1111 1111 0x5c regoff13 off time/intensity register for i/o[13] 0000 0000 0x5d regtrise13 fade in register for i/o[13] 0000 0000 0x5e regtfall13 fade out register for i/o[13] 0000 0000 0x5f regton14 on time register for i/o[14] 0000 0000 0x60 region14 on intensity register for i/o[14] 1111 1111 0x61 regoff14 off time/intensity register for i/o[14] 0000 0000 0x62 regtrise14 fade in register for i/o[14] 0000 0000 0x63 regtfall14 fade out register for i/o[14] 0000 0000 0x64 regton15 on time register for i/o[15] 0000 0000 0x65 region15 on intensity register for i/o[15] 1111 1111 0x66 regoff15 off time/intensity register for i/o[15] 0000 0000 0x67 regtrise15 fade in register for i/o[15] 0000 0000 0x68 regtfall15 fade out register for i/o[15] 0000 0000 miscellaneous 0x69 reghighinputb high input enable register - i/o[15-8] (bank b) 000 0 0000 0x6a reghighinputa high input enable register - i/o[7-0] (bank a) 0000 0000 software reset 0x7d regreset software reset register 0000 0000 test (not to be written) 0x7e regtest1 test register 0000 0000 0x7f regtest2 test register 0000 0000 *bits set as output take 1 as defau lt value. table 13 C sx1509qb configuration registers overvie w
advanced communications & sensing rev 3 C 9 th sept. 2010 32 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine addr name default bits description 0x00 reginputdisableb 0x00 7:0 disables the input buffer of each io 0 : input buffer is enabled (input actually being u sed) 1 : input buffer is disabled (input actually not be ing used or led connection) 0x01 reginputdisablea 0x00 7:0 disables the input buffer of each io 0 : input buffer is enabled (input actually being u sed) 1 : input buffer is disabled (input actually not be ing used, led connection) 0x02 reglongslewb 0x00 7:0 enables increased slew rate of the output buffer of each [output-configured] io 0 : increased slew rate is disabled 1 : increased slew rate is enabled 0x03 reglongslewa 0x00 7:0 enables increased slew rate of the output buffer of each [output-configured] io 0 : increased slew rate is disabled 1 : increased slew rate is enabled 0x04 reglowdriveb 0x00 7:0 enables reduced drive of the output buffer of each [output-configured] io 0 : reduced drive is disabled 1 : reduced drive is enabled. iol specifications ar e divided by 2. 0x05 reglowdrivea 0x00 7:0 enables reduced drive of the output buffer of each [output-configured] io 0 : reduced drive is disabled 1 : reduced drive is enabled. iol specifications ar e divided by 2. 0x06 regpullupb 0x00 7:0 enables the pull-up for each io 0 : pull-up is disabled 1 : pull-up is enabled 0x07 regpullupa 0x00 7:0 enables the pull-up for each io 0 : pull-up is disabled 1 : pull-up is enabled 0x08 regpulldownb 0x00 7:0 enables the pull-down for each io 0 : pull-down is disabled 1 : pull-down is enabled 0x09 regpulldowna 0x00 7:0 enables the pull-down for each io 0 : pull-down is disabled 1 : pull-down is enabled 0x0a regopendrainb 0x00 7:0 enables open drain operation for each [output-confi gured] io 0 : regular push-pull operation 1 : open drain operation 0x0b regopendraina 0x00 7:0 enables open drain operation for each [output-confi gured] io 0 : regular push-pull operation 1 : open drain operation 0x0c regpolarityb 0x00 7:0 enables polarity inversion for each io 0 : normal polarity : regdata[x] = io[x] 1 : inverted polarity : regdata[x] = !io[x] (for bo th input and output configured ios) 0x0d regpolaritya 0x00 7:0 enables polarity inversion for each io 0 : normal polarity : regdata[x] = io[x] 1 : inverted polarity : regdata[x] = !io[x] (for bo th input and output configured ios) 0x0e regdirb 0xff 7:0 configures direction for each io. 0 : io is configured as an output 1 : io is configured as an input 0x0f regdira 0xff 7:0 configures direction for each io. 0 : io is configured as an output 1 : io is configured as an input 0x10 regdatab 0xff 7:0 write: data to be output to the output-configured i os read: data seen at the ios, independent of the dire ction configured. 0x11 regdataa 0xff 7:0 write: data to be output to the output-configured i os read: data seen at the ios, independent of the dire ction configured. 0x12 reginterruptmaskb 0xff 7:0 configures which [input-configured] io will trigger an interrupt on nint pin 0 : an event on this io will trigger an interrupt 1 : an event on this io will not trigger an interru pt 0x13 reginterruptmaska 0xff 7:0 configures which [input-configured] io will trigger an interrupt on nint pin 0 : an event on this io will trigger an interrupt 1 : an event on this io will not trigger an interru pt 7:6 edge sensitivity of regdata[15] 5:4 edge sensitivity of regdata[14] 3:2 edge sensitivity of regdata[13] 0x14 regsensehighb 0x00 1:0 edge sensitivity of regdata[12] 00 : none 01 : rising 10 : falling 11 : both 7:6 edge sensitivity of regdata[11] 5:4 edge sensitivity of regdata[10] 3:2 edge sensitivity of regdata[9] 0x15 regsenselowb 0x00 1:0 edge sensitivity of regdata[8] 00 : none 01 : rising 10 : falling 11 : both 7:6 edge sensitivity of regdata[7] 5:4 edge sensitivity of regdata[6] 3:2 edge sensitivity of regdata[5] 0x16 regsensehigha 0x00 1:0 edge sensitivity of regdata[4] 00 : none 01 : rising 10 : falling 11 : both 0x17 regsenselow a 0x00 7:6 edge sensitivity of regdata[3] 00 : none
advanced communications & sensing rev 3 C 9 th sept. 2010 33 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 5:4 edge sensitivity of regdata[2] 3:2 edge sensitivity of regdata[1] 1:0 edge sensitivity of regdata[0] 0x18 reginterruptsourceb 0x00 7:0 interrupt source (from ios set in reginterruptmask) 0 : no interrupt has been triggered by this io 1 : an interrupt has been triggered by this io (an event as configured in relevant regsense register occured). writing '1' clears the bit in reginterruptsource an d in regeventstatus when all bits are cleared, nint signal goes back hi gh. 0x19 reginterruptsourcea 0x00 7:0 interrupt source (from ios set in reginterruptmask) 0 : no interrupt has been triggered by this io 1 : an interrupt has been triggered by this io (an event as configured in relevant regsense register occured). writing '1' clears the bit in reginterruptsource an d in regeventstatus when all bits are cleared, nint signal goes back hi gh. 0x1a regeventstatusb 0x00 7:0 event status of all ios. 0 : no event has occured on this io 1 : an event has occured on this io (an edge as con figured in relevant regsense register occured). writing '1' clears the bit in regeventstatus and in reginterruptsource if relevant. if the edge sensitivity of the io is changed, the b it(s) will be cleared automatically 0x1b regeventstatusa 0x00 7:0 event status of all ios. 0 : no event has occured on this io 1 : an event has occured on this io (an edge as con figured in relevant regsense register occured). writing '1' clears the bit in regeventstatus and in reginterruptsource if relevant. if the edge sensitivity of the io is changed, the b it(s) will be cleared automatically 7:6 level shifter mode for io[7] (bank a) and io[15 ] (bank b) 5:4 level shifter mode for io[6] (bank a) and io[14 ] (bank b) 3:2 level shifter mode for io[5] (bank a) and io[13 ] (bank b) 0x1c reglevelshifter1 0x00 1:0 level shifter mode for io[4] (bank a) and io[12 ] (bank b) 00 : off 01 : a->b 10 : b->a 11 : reserved 7:6 level shifter mode for io[3] (bank a) and io[11 ] (bank b) 5:4 level shifter mode for io[2] (bank a) and io[10 ] (bank b) 3:2 level shifter mode for io[1] (bank a) and io[9] (bank b) 0x1d reglevelshifter2 0x00 1:0 level shifter mode for io[0] (bank a) and io[8] (bank b) 00 : off 01 : a->b 10 : b->a 11 : reserved 7 unused 6:5 oscillator frequency (fosc) source 00 : off. led driver, keypad engine and debounce fe atures are disabled. 01 : external clock input (oscin) 10 : internal 2mhz oscillator 11 : reserved 4 oscio pin function (cf. 4.8) 0 : oscio is an input (oscin) 1 : oscio is an output (oscout) 0x1e regclock 0x00 3:0 frequency of the signal output on oscout pin: 0x0 : 0hz, permanent "0" logical level (gpo) 0xf : 0hz, permanent "1" logical level (gpo) else : foscout = fosc/(2^(regclock[3:0]-1)) 7 led driver mode for bank b s fading capable ios (i o15-12) 0: linear 1: logarithmic 6:4 frequency of the led driver clock clkx of all ios: 0 : off. led driver functionality is disabled for a ll ios. else : clkx = fosc/(2^(regmisc[6:4]-1)) 3 led driver mode for bank a s fading capable ios (i o7-4) 0: linear 1: logarithmic 2 nreset pin function when externally forced low (cf. 4.4.1 and 4.9.5) 0: equivalent to por 1: reset pwm/blink/fade counters (not user programm ed values) this bit is can only be reset manually or by por, n ot by nreset. 1 auto-increment register address (cf. 4.5) 0: on. when several consecutive data are read/writt en, register address is incremented. 1: off. when several consecutive data are read/writ ten, register address is kept fixed. 0x1f regmisc 0x00 0 autoclear nint on regdata read (cf. 4.7) 0: on. reginterruptsourcea/b is also automatically cleared when regdataa/b is read. 1: off. reginterruptsourcea/b must be manually clea red, either directly or via regeventstatusa/b. 0x20 regleddriverenableb 0x00 7:0 enables led driver for each [output-configured] io 0 : led driver is disabled 1 : led driver is enabled
advanced communications & sensing rev 3 C 9 th sept. 2010 34 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 0x21 regleddriverenablea 0x00 7:0 enables led driver for each [output-configured] io 0 : led driver is disabled 1 : led driver is enabled 7:3 unused 0x22 regdebounceconfig 0x00 2:0 debounce time (cf. 4.6.1) 000: 0.5ms x 2mhz/fosc 001: 1ms x 2mhz/fosc 010: 2ms x 2mhz/fosc 011: 4ms x 2mhz/fosc 100: 8ms x 2mhz/fosc 101: 16ms x 2mhz/fosc 110: 32ms x 2mhz/fosc 111: 64ms x 2mhz/fosc 0x23 regdebounceenableb 0x00 7:0 enables debouncing for each [input-configured] io 0 : debouncing is disabled 1 : debouncing is enabled 0x24 regdebounceenablea 0x00 7:0 enables debouncing for each [input-configured] io 0 : debouncing is disabled 1 : debouncing is enabled 7 reserved 6:4 auto sleep time (no key press within this time will set keypad engine to sleep) 000 : off 001 : 128ms x 2mhz/fosc 010 : 256ms x 2mhz/fosc 011 : 512ms x 2mhz/fosc 100 : 1sec x 2mhz/fosc 101 : 2sec x 2mhz/fosc 110 : 4sec x 2mhz/fosc 111 : 8sec x 2mhz/fosc 3 unused 0x25 regkeyconfig1 0x00 2:0 scan time per row (must be set above debounce time) . 000 : 1ms x 2mhz/fosc 001 : 2ms x 2mhz/fosc 010 : 4ms x 2mhz/fosc 011 : 8ms x 2mhz/fosc 100 : 16ms x 2mhz/fosc 101 : 32ms x 2mhz/fosc 110 : 64ms x 2mhz/fosc 111 : 128ms x 2mhz/fosc 7:6 unused 5:3 number of rows (outputs) + key scan enable 000 : key scan off 001 : 2 rows C io[0:1] 010 : 3 rows C io[0:2] 011 : 4 rows C io[0:3] 100 : 5 rows C io[0:4] 101 : 6 rows C io[0:5] 110 : 7 rows C io[0:6] 111 : 8 rows C io[0:7] 0x26 regkeyconfig2 0x00 2:0 number of columns (inputs) 000 : 1 column C io[8] 001 : 2 columns C io[8:9] 010 : 3 columns C io[8:10] 011 : 4 columns C io[8:11] 100 : 5 columns C io[8:12] 101 : 6 columns C io[8:13] 110 : 7 columns C io[8:14] 111 : 8 columns C io[8:15] 0x27 regkeydata1 0xff 7:0 column which generated nint (active low) ex: regkeydata1=11011111 => io13 has generated nint the register is automatically cleared when regkeyda ta2 is read. 0x28 regkeydata2 0xff 7:0 row which generated nint (active low) ex: regkeydata2=11111110 => io0 has generated nint when the register is read both regkeydata1 & regkey data2 are automatically cleared together with nint and key scan continues. 7:5 unused 0xxx regtonx 0x00 4:0 on time of io[x]: 0 : infinite (static mode, ton directly controlled by regdata, cf 4.9.2) 1 - 15 : tonx = 64 * regtonx * (255/clkx) 16 - 31 : tonx = 512 * regtonx * (255/clkx) 0xxx regionx 0xff 7:0 on intensity of io[x] - linear mode : ionx = regionx - logarithmic mode (fading capable ios only) : ionx = f(regionx) , cf 4.9.5
advanced communications & sensing rev 3 C 9 th sept. 2010 35 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 7:3 off time of io[x]: 0 : infinite (single shot mode, toff directly contr olled by regdata, cf 4.9.3) 1 - 15 : toffx = 64 * regoffx[7:3] * (255/clkx) 16 - 31 : toffx = 512 * regoffx[7:3] * (255/clkx) 0xxx regoffx 0x00 2:0 off intensity of io[x] - linear mode : ioffx = 4 x regoff[2:0] - logarithmic mode (fading capable ios only) : ioff x = f(4 x regoffx[2:0]) , cf 4.9.5 7:5 unused 0xxx regtrisex 0x00 4:0 fade in setting of io[x] 0 : off 1 - 15 : trisex = (regionx-(4xregoffx[2:0])) * regt risex * (255/clkx) 16 - 31 : trisex = 16 * (regionx-(4xregoffx[2:0])) * regtrisex * (255/clkx) 7:5 unused 0xxx regtfallx 0x00 4:0 fade out setting of io[x] 0 : off 1 - 15 : tfallx = (regionx-(4xregoffx[2:0])) * regt fallx * (255/clkx) 16 - 31 : tfallx = 16 * (regionx-(4xregoffx[2:0])) * regtfallx * (255/clkx) 0x69 reghighinputb 0x00 7:0 enables high input mode for each [input-configured] io 0 : off. vih max = 3.6v and vccx min = 1.2v 1 : on. vih max = 5.5v and vccx min = 1.65v 0x6a reghighinputa 0x00 7:0 enables high input mode for each [input-configured] io 0 : off. vih max = 3.6v and vccx min = 1.2v 1 : on. vih max = 5.5v and vccx min = 1.65v 0x7d regreset 0x00 7:0 software reset register writing consecutively 0x12 and 0x34 will reset the device (same as por). always reads 0. table 14 C sx1509qb configuration registers descrip tion
advanced communications & sensing rev 3 C 9 th sept. 2010 36 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 6 a pplication i nformation 6.1 typical application circuit figure 21 - typical application schematic 6.2 typical led connection typical led connection is described below. the led is usually connected to a high voltage (vbat) to ta ke advantage of the high sink current of the i/o and t o accommodate high led threshold voltages (vled). please note that in this configuration the io must be programmed as open drain output (regopendrain) w ith no pull-up (regpullup) and input buffer must be disabl ed (reginputbufferdisable). vccx can take any value without compromising led op eration. vccx iox vbat vccx vled * * led colour/technology dependent sx1507/8/9qb iol r figure 22 C typical led operation serial r must be calculated for iol not to exceed i ts max spec (cf. table 5) else vol will increase. v ddm nreset scl sda addr1 gnd vcc1 i/o[0] i/o[2] i/o[3] nint i/o[4] i/o[5] i/o[6] i/o[7] vcc2 sx 1508q b scl sda i/o i/o 3.3v 2.5v 1.2v 5v optional (depends on the application) 5v host controlle r oscio i/o[1] addr0
advanced communications & sensing rev 3 C 9 th sept. 2010 37 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 7 p ackaging i nformation 7.1 qfn-ut 14-pin outline drawing qfn 14-pin, 2 x 2 mm, 0.4 mm pitch figure 23 C qfn-ut 14-pin outline drawing 7.2 qfn-ut 14-pin land pattern figure 24 C qfn-ut 14-pin land pattern
advanced communications & sensing rev 3 C 9 th sept. 2010 38 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 7.3 qfn-ut 20-pin outline drawing qfn-ut 20-pin, 3 x 3 mm, 0.4 mm pitch figure 25 - qfn-ut 20-pin outline drawing 7.4 qfn-ut 20-pin land pattern figure 26 - qfn-ut 20-pin land pattern
advanced communications & sensing rev 3 C 9 th sept. 2010 39 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 7.5 qfn-ut 28-pin outline drawing qfn-ut 28-pin, 4 x 4 mm, 0.4 mm pitch figure 27 - qfn-ut 28-pin outline drawing 7.6 qfn-ut 28-pin land pattern figure 28 - qfn-ut 28-pin land pattern
advanced communications & sensing rev 3 C 9 th sept. 2010 40 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 8 s oldering p rofile the soldering reflow profile for the sx1507qb, sx15 08qb and sx1509qb is described in the standard ipc/jedec j-std-020c. for detailed information plea se go to http://www.jedec.org/download/search/jstd020c.pdf figure 29 - classification reflow profile (ipc/jede c j-std-020c)
advanced communications & sensing rev 3 C 9 th sept. 2010 41 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine 9 m arking i nformation hab7 yyww xxxx yyww =datecode xxxx =semtechlotno. figure 30 C sx1508qb marking information hca5 yyww xxxxx xxxxx yyww =datecode xxxxx =semtechlotno. xxxxx figure 31 C sx1509qb marking information
advanced communications & sensing rev 3 C 9 th sept. 2010 42 www.semtech.com sx1507qb/sx1508qb/sx1509qb worlds lowest voltage level shifting gpio with led drive r and keypad engine contact information ? semtech 2010 all rights res erved. reproduction in whole or in part is prohibit ed without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or con tract, is believed to be accurate and reliable and may be c hanged without notice. no liability will be accepte d by the publisher for any consequence of its use. publicati on thereof does not convey nor imply any license un der patent or other industrial or intellectual property rights . semtech assumes no responsibil ity or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installation, repair or im proper handling or unusual physical or electrical stress i ncluding, but not limited to, exposure to parameter s beyond the specified maximum ratings or operation outside the specified range. semtech products are not designed, intended, author ized or warranted to be suitable for use in life- support applications, devices or systems or other c ritical applications. inclusion of s emtech products in such applications is understood to be undertaken solely at the customers own risk. should a customer purchase or use semtech products for any such unauthorized application, the customer shall indemnify and hold semtech and its officers, employees, subsidiaries, affiliates, and distributo rs harmless against all claims , costs damages and attorney fees which could arise. notice: all referenced brands, product names, servi ce names and trademarks are the property of their respective owners. semtech corporation advanced communications and sensing products divisi on 200 flynn road, camarillo, ca 93012 phone: (805) 498-2111 fax: (805) 498-3804

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